Chip Design ML papers, 2023–2026

Key findings

• Chip Design ML went from 28 papers in 2023 to 64 in 2026, roughly 2.3x in three years.
• NeurIPS publishes the most Chip Design ML work: 83 papers from 2023 to 2026, 46% of the four-venue total.
• The fastest-growing overlap is with Diffusion Models: papers tagged with both rose from 0 in 2023 to 9 in 2026.
• Among the 5 topics under Hardware and Compilers, it ranks #2 by 2026 paper count; the fastest grower in the group, Edge Inference, is up 4.0x versus 2.3x here.

Representative papers

Spread across years and venues so every edition shows up

• NeurIPS 2026ChiP-STAR: Spatial-Topological Attention for Pre-trained Generative Chip Routing
• ICML 2026Order Matters: Unveiling the Hidden Impact of Macro Placement Sequences via Proxy-Guided LLM Evolution
• ICLR 2026How Muon’s Spectral Design Benefits Generalization: A Study on Imbalanced Data
• CVPR 2026PSDesigner Automated Graphic Design with a Human-Like Creative Workflow
• NeurIPS 2025MIHC: Multi-View Interpretable Hypergraph Neural Networks with Information Bottleneck for Chip Congestion Prediction
• ICML 2025Probabilistic Factorial Experimental Design for Combinatorial Interventions
• ICLR 2025LaMPlace: Learning to Optimize Cross-Stage Metrics in Macro Placement
• CVPR 2025From Elements to Design: A Layered Approach for Automatic Graphic Design Composition
• NeurIPS 2024AFBench: A Large-scale Benchmark for Airfoil Design
• ICML 2024A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Design
• ICLR 2024CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment
• CVPR 2024Discontinuity-preserving Normal Integration with Auxiliary Edges
• NeurIPS 2023Circuit as Set of Points
• ICML 2023AbODE: Ab initio antibody design using conjoined ODEs
• ICLR 2023Neural Design for Genetic Perturbation Experiments
• CVPR 2023Visibility Constrained Wide-Band Illumination Spectrum Design for Seeing-in-the-Dark
• NeurIPS 2026DiffCool: Label-Free Synthesis of Chip-Tailored Heat Sinks via Thermal-Aware Diffusion
• ICML 2026Axiomatic Atlas: A Prescriptive Framework for Neural Architecture Design
• ICLR 2026Topology Matters in RTL Circuit Representation Learning
• CVPR 2026FEAT Fashion Editing and Try-On from Any Design

All Chip Design ML papers

64 papers, page 1 of 2

1. CVPR 2026Elucidating the Design Space of Arbitrary-Noise-Based Diffusion Models
2. CVPR 2026FEAT Fashion Editing and Try-On from Any Design
3. CVPR 2026PSDesigner Automated Graphic Design with a Human-Like Creative Workflow
4. ICLR 2026A Joint Diffusion Model with Pre-Trained Priors for RNA Sequence–Structure Co-Design
5. ICLR 2026Expertise Can Be Helpful for Reinforcement Learning-based Macro Placement
6. ICLR 2026Exploring the Design Space of Transition Matching
7. ICLR 2026How Muon’s Spectral Design Benefits Generalization: A Study on Imbalanced Data
8. ICLR 2026Learning AND–OR Templates for Compositional Representation in Art and Design
9. ICLR 2026On the Design of One-step Diffusion via Shortcutting Flow Paths
10. ICLR 2026SEED-SET: Scalable Evolving Experimental Design for System-level Ethical Testing
11. ICLR 2026Si-GT: Fast Interconnect Signal Integrity Analysis for Integrated Circuit Design via Graph Transformers
12. ICLR 2026Topology Matters in RTL Circuit Representation Learning
13. ICML 2026Axiomatic Atlas: A Prescriptive Framework for Neural Architecture Design
14. ICML 2026Design Linear Constrained Neural Layers with Implicit Convex Optimization
15. ICML 2026Design-Based Anytime-Valid Inference for Randomized Experiments with Delayed Outcomes and Staggered Entry
16. ICML 2026Evolution of Benchmark: Black-Box Optimization Benchmark Design through Large Language Model
17. ICML 2026FlashSketch: Sketch-Kernel Co-Design for Fast Sparse Sketching on GPUs
18. ICML 2026Incentivized Exploration with Stochastic Covariates: A Two-Stage Mechanism Design for Recommender System
19. ICML 2026Leaderboard Incentives: Model Rankings under Strategic Post-Training
20. ICML 2026Mitigating Plasticity Loss through Architectural Design in Continual Learning
21. ICML 2026Neural Collapse by Design: Learning Class Prototypes on the Hypersphere
22. ICML 2026Nonlinear Covariate Balance in Experimental Design
23. ICML 2026Order Matters: Unveiling the Hidden Impact of Macro Placement Sequences via Proxy-Guided LLM Evolution
24. ICML 2026Overcoming the Incentive Collapse Paradox
25. ICML 2026Prototype Transformer: Towards Language Model Architectures Interpretable by Design
26. ICML 2026ReNF: Rethinking the Design of Neural Long-Term Time Series Forecasters
27. ICML 2026Risk-Averse and Optimistic Advertiser Incentive Compatibility in Auto-bidding
28. ICML 2026RulePlanner: All-in-One Reinforcement Learner for Unifying Design Rules in 3D Floorplanning
29. ICML 2026SiameseNorm: Breaking the Barrier to Reconciling Pre/Post-Norm
30. ICML 2026Zeroth-Order Forward-Only SNN Training Inspiring Neuromorphic On-Chip Learning
31. NeurIPS 2026$R^2E$: A Role-driven Reward Evolutionary Framework for Automated Reward Function Design
32. NeurIPS 2026A Generalized Tikhonov Layer for Interpretable-by-design Graph Neural Networks
33. NeurIPS 2026An Equivariance Principle for Optimizer Design: Symmetry-Compatible Updates for Embeddings, LM Heads, and MoE Routers
34. NeurIPS 2026AutoManifold: Agentic Design of Data Visualisation Algorithms via Manifold Embedding
35. NeurIPS 2026ChiP-STAR: Spatial-Topological Attention for Pre-trained Generative Chip Routing
36. NeurIPS 2026Computational Dynamic Mechanism Design
37. NeurIPS 2026DiffCool: Label-Free Synthesis of Chip-Tailored Heat Sinks via Thermal-Aware Diffusion
38. NeurIPS 2026Differentiating Network Design Objectives for Balancing Cost and Distance
39. NeurIPS 2026EGCA: A Spectral Perspective on Forward Process Design in Diffusion Models
40. NeurIPS 2026GenAI Evaluation Results are Largely Artifacts of Evaluation Design Choices: Evidence from Audit Studies of Resume Screening
41. NeurIPS 2026HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip
42. NeurIPS 2026Large Language Models Enhanced Covariate-adjusted Response-adaptive Randomization Design
43. NeurIPS 2026LLM Judge Validation Under Sparse Overlap: From Inference to Design
44. NeurIPS 2026Locality-Controlled OOD Guidance for Robust Regulatory DNA Sequence Design
45. NeurIPS 2026Maximin Robust Bayesian Experimental Design
46. NeurIPS 2026Mechanism Design for AI Overviews: Creator Incentives and Long-Term Profit
47. NeurIPS 2026Mechanistic Critics for Sample-Efficient NPU Design-Space Exploration
48. NeurIPS 2026Mitigating Overgeneralization in RND via Spectral Target Design
49. NeurIPS 2026Neural-Corrected Operator Learning for Homogenization and Inverse Design
50. NeurIPS 2026On the Meta-Design of Allocation Problems

FAQ

How many Chip Design ML papers were published at NeurIPS, ICLR, ICML and CVPR from 2023 to 2026?

179 in total: 28 in 2023, 43 in 2024, 44 in 2025, 64 in 2026.

How many Chip Design ML papers are at NeurIPS 2026?

NeurIPS 2026 has 34 Chip Design ML papers, versus 20 the year before.

How many Chip Design ML papers are at ICLR 2026?

ICLR 2026 has 9 Chip Design ML papers, versus 9 the year before.

How many Chip Design ML papers are at ICML 2026?

ICML 2026 has 18 Chip Design ML papers, versus 9 the year before.

How many Chip Design ML papers are at CVPR 2026?

CVPR 2026 has 3 Chip Design ML papers, versus 6 the year before.

Which conference publishes the most Chip Design ML papers?

NeurIPS, with 83 papers from 2023 to 2026.