Chip Design ML papers, 2023–2026

Key findings

• Chip Design ML went from 28 papers in 2023 to 64 in 2026, roughly 2.3x in three years.
• NeurIPS publishes the most Chip Design ML work: 83 papers from 2023 to 2026, 46% of the four-venue total.
• The fastest-growing overlap is with Diffusion Models: papers tagged with both rose from 0 in 2023 to 9 in 2026.
• Among the 5 topics under Hardware and Compilers, it ranks #2 by 2026 paper count; the fastest grower in the group, Edge Inference, is up 4.0x versus 2.3x here.

Representative papers

Spread across years and venues so every edition shows up

• NeurIPS 2026ChiP-STAR: Spatial-Topological Attention for Pre-trained Generative Chip Routing
• ICML 2026Order Matters: Unveiling the Hidden Impact of Macro Placement Sequences via Proxy-Guided LLM Evolution
• ICLR 2026How Muon’s Spectral Design Benefits Generalization: A Study on Imbalanced Data
• CVPR 2026PSDesigner Automated Graphic Design with a Human-Like Creative Workflow
• NeurIPS 2025MIHC: Multi-View Interpretable Hypergraph Neural Networks with Information Bottleneck for Chip Congestion Prediction
• ICML 2025Probabilistic Factorial Experimental Design for Combinatorial Interventions
• ICLR 2025LaMPlace: Learning to Optimize Cross-Stage Metrics in Macro Placement
• CVPR 2025From Elements to Design: A Layered Approach for Automatic Graphic Design Composition
• NeurIPS 2024AFBench: A Large-scale Benchmark for Airfoil Design
• ICML 2024A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Design
• ICLR 2024CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment
• CVPR 2024Discontinuity-preserving Normal Integration with Auxiliary Edges
• NeurIPS 2023Circuit as Set of Points
• ICML 2023AbODE: Ab initio antibody design using conjoined ODEs
• ICLR 2023Neural Design for Genetic Perturbation Experiments
• CVPR 2023Visibility Constrained Wide-Band Illumination Spectrum Design for Seeing-in-the-Dark
• NeurIPS 2026DiffCool: Label-Free Synthesis of Chip-Tailored Heat Sinks via Thermal-Aware Diffusion
• ICML 2026Axiomatic Atlas: A Prescriptive Framework for Neural Architecture Design
• ICLR 2026Topology Matters in RTL Circuit Representation Learning
• CVPR 2026FEAT Fashion Editing and Try-On from Any Design

All Chip Design ML papers

83 papers, page 1 of 2

1. NeurIPS 2026$R^2E$: A Role-driven Reward Evolutionary Framework for Automated Reward Function Design
2. NeurIPS 2026A Generalized Tikhonov Layer for Interpretable-by-design Graph Neural Networks
3. NeurIPS 2026An Equivariance Principle for Optimizer Design: Symmetry-Compatible Updates for Embeddings, LM Heads, and MoE Routers
4. NeurIPS 2026AutoManifold: Agentic Design of Data Visualisation Algorithms via Manifold Embedding
5. NeurIPS 2026ChiP-STAR: Spatial-Topological Attention for Pre-trained Generative Chip Routing
6. NeurIPS 2026Computational Dynamic Mechanism Design
7. NeurIPS 2026DiffCool: Label-Free Synthesis of Chip-Tailored Heat Sinks via Thermal-Aware Diffusion
8. NeurIPS 2026Differentiating Network Design Objectives for Balancing Cost and Distance
9. NeurIPS 2026EGCA: A Spectral Perspective on Forward Process Design in Diffusion Models
10. NeurIPS 2026GenAI Evaluation Results are Largely Artifacts of Evaluation Design Choices: Evidence from Audit Studies of Resume Screening
11. NeurIPS 2026HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip
12. NeurIPS 2026Large Language Models Enhanced Covariate-adjusted Response-adaptive Randomization Design
13. NeurIPS 2026LLM Judge Validation Under Sparse Overlap: From Inference to Design
14. NeurIPS 2026Locality-Controlled OOD Guidance for Robust Regulatory DNA Sequence Design
15. NeurIPS 2026Maximin Robust Bayesian Experimental Design
16. NeurIPS 2026Mechanism Design for AI Overviews: Creator Incentives and Long-Term Profit
17. NeurIPS 2026Mechanistic Critics for Sample-Efficient NPU Design-Space Exploration
18. NeurIPS 2026Mitigating Overgeneralization in RND via Spectral Target Design
19. NeurIPS 2026Neural-Corrected Operator Learning for Homogenization and Inverse Design
20. NeurIPS 2026On the Meta-Design of Allocation Problems
21. NeurIPS 2026PCBInnoBench: Benchmarking LLM Agents on Real-World PCB Design
22. NeurIPS 2026Principled Design of Diffusion-based Optimizers for Inverse Problems
23. NeurIPS 2026Refactoring Code Through Library Design
24. NeurIPS 2026Regret Minimization in Single-Dimensional Contract-Design with Binary Actions
25. NeurIPS 2026Robust-by-Design Distributional Learning from Contaminated Samples
26. NeurIPS 2026Sample Size Design for Bounds on Discrete Probabilities of Causation
27. NeurIPS 2026Scattered by Design: Why Per-Output Pruning Resists Structured Compression
28. NeurIPS 2026Selectivity and Shape in the Design of Forward-Forward Goodness Functions
29. NeurIPS 2026SimpleEvol: Efficient Intelligence Conversion via Less Human Prior in Automated Heuristic Design
30. NeurIPS 2026The Alternation Depth Principle for Neural Operator Design
31. NeurIPS 2026The Design Space of Tri-Modal Masked Diffusion Models
32. NeurIPS 2026VEHBench: A Stage-Local Diagnostic Benchmark for LLM-Assisted Vibration Energy Harvester Design
33. NeurIPS 2026When Does Knowing the State Help? Diagnosing Process vs. Outcome Reward Design
34. NeurIPS 2026μLM: Rethinking Sub-100M Language Models through Memory-First Design
35. NeurIPS 2025A Cramér–von Mises Approach to Incentivizing Truthful Data Sharing
36. NeurIPS 2025Adaptive Kernel Design for Bayesian Optimization Is a Piece of CAKE with LLMs
37. NeurIPS 2025Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithms
38. NeurIPS 2025Convergent Functions, Divergent Forms
39. NeurIPS 2025Ctrl-DNA: Controllable Cell-Type-Specific Regulatory DNA Design via Constrained RL
40. NeurIPS 2025Design-Based Bandits Under Network Interference: Trade-Off Between Regret and Statistical Inference
41. NeurIPS 2025Efficient Bayesian Experiment Design with Equivariant Networks
42. NeurIPS 2025Exploring the Design Space of Diffusion Bridge Models
43. NeurIPS 2025Geometric Algebra-Enhanced Bayesian Flow Network for RNA Inverse Design
44. NeurIPS 2025Hadamax Encoding: Elevating Performance in Model-Free Atari
45. NeurIPS 2025Mechanism Design via the Interim Relaxation
46. NeurIPS 2025MIHC: Multi-View Interpretable Hypergraph Neural Networks with Information Bottleneck for Chip Congestion Prediction
47. NeurIPS 2025Online Experimental Design With Estimation-Regret Trade-off Under Network Interference
48. NeurIPS 2025Procurement Auctions with Predictions: Improved Frugality for Facility Location
49. NeurIPS 2025Protein Design with Dynamic Protein Vocabulary
50. NeurIPS 2025RiboFlow: Conditional De Novo RNA Co-Design via Synergistic Flow Matching

FAQ

How many Chip Design ML papers were published at NeurIPS, ICLR, ICML and CVPR from 2023 to 2026?

179 in total: 28 in 2023, 43 in 2024, 44 in 2025, 64 in 2026.

How many Chip Design ML papers are at NeurIPS 2026?

NeurIPS 2026 has 34 Chip Design ML papers, versus 20 the year before.

How many Chip Design ML papers are at ICLR 2026?

ICLR 2026 has 9 Chip Design ML papers, versus 9 the year before.

How many Chip Design ML papers are at ICML 2026?

ICML 2026 has 18 Chip Design ML papers, versus 9 the year before.

How many Chip Design ML papers are at CVPR 2026?

CVPR 2026 has 3 Chip Design ML papers, versus 6 the year before.

Which conference publishes the most Chip Design ML papers?

NeurIPS, with 83 papers from 2023 to 2026.