Chip Design ML papers, 2023–2026

Key findings

• Chip Design ML went from 28 papers in 2023 to 64 in 2026, roughly 2.3x in three years.
• NeurIPS publishes the most Chip Design ML work: 83 papers from 2023 to 2026, 46% of the four-venue total.
• The fastest-growing overlap is with Diffusion Models: papers tagged with both rose from 0 in 2023 to 9 in 2026.
• Among the 5 topics under Hardware and Compilers, it ranks #2 by 2026 paper count; the fastest grower in the group, Edge Inference, is up 4.0x versus 2.3x here.

Representative papers

Spread across years and venues so every edition shows up

• NeurIPS 2026ChiP-STAR: Spatial-Topological Attention for Pre-trained Generative Chip Routing
• ICML 2026Order Matters: Unveiling the Hidden Impact of Macro Placement Sequences via Proxy-Guided LLM Evolution
• ICLR 2026How Muon’s Spectral Design Benefits Generalization: A Study on Imbalanced Data
• CVPR 2026PSDesigner Automated Graphic Design with a Human-Like Creative Workflow
• NeurIPS 2025MIHC: Multi-View Interpretable Hypergraph Neural Networks with Information Bottleneck for Chip Congestion Prediction
• ICML 2025Probabilistic Factorial Experimental Design for Combinatorial Interventions
• ICLR 2025LaMPlace: Learning to Optimize Cross-Stage Metrics in Macro Placement
• CVPR 2025From Elements to Design: A Layered Approach for Automatic Graphic Design Composition
• NeurIPS 2024AFBench: A Large-scale Benchmark for Airfoil Design
• ICML 2024A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Design
• ICLR 2024CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment
• CVPR 2024Discontinuity-preserving Normal Integration with Auxiliary Edges
• NeurIPS 2023Circuit as Set of Points
• ICML 2023AbODE: Ab initio antibody design using conjoined ODEs
• ICLR 2023Neural Design for Genetic Perturbation Experiments
• CVPR 2023Visibility Constrained Wide-Band Illumination Spectrum Design for Seeing-in-the-Dark
• NeurIPS 2026DiffCool: Label-Free Synthesis of Chip-Tailored Heat Sinks via Thermal-Aware Diffusion
• ICML 2026Axiomatic Atlas: A Prescriptive Framework for Neural Architecture Design
• ICLR 2026Topology Matters in RTL Circuit Representation Learning
• CVPR 2026FEAT Fashion Editing and Try-On from Any Design

All Chip Design ML papers

83 papers, page 2 of 2

51. NeurIPS 2025Sample complexity of data-driven tuning of model hyperparameters in neural networks with structured parameter-dependent dual function
52. NeurIPS 2025Spectral Analysis of Diffusion Models with Application to Schedule Design
53. NeurIPS 2025Towards Reliable and Holistic Visual In-Context Learning Prompt Selection
54. NeurIPS 2025VeriLoC: Line-of-Code Level Prediction of Hardware Design Quality from Verilog Code
55. NeurIPS 2024Accelerating ERM for data-driven algorithm design using output-sensitive techniques
56. NeurIPS 2024AFBench: A Large-scale Benchmark for Airfoil Design
57. NeurIPS 2024Amortized Bayesian Experimental Design for Decision-Making
58. NeurIPS 2024Data Acquisition via Experimental Design for Data Markets
59. NeurIPS 2024DOFEN: Deep Oblivious Forest ENsemble
60. NeurIPS 2024Fair Allocation in Dynamic Mechanism Design
61. NeurIPS 2024Generalization Bound and Learning Methods for Data-Driven Projections in Linear Programming
62. NeurIPS 2024Generalized Linear Bandits with Limited Adaptivity
63. NeurIPS 2024Learning Optimal Tax Design in Nonatomic Congestion Games
64. NeurIPS 2024Mechanism design augmented with output advice
65. NeurIPS 2024NeuralSteiner: Learning Steiner Tree for Overflow-avoiding Global Routing in Chip Design
66. NeurIPS 2024Optimal Design for Human Preference Elicitation
67. NeurIPS 2024Randomized Strategic Facility Location with Predictions
68. NeurIPS 2024Reinforcement Learning Policy as Macro Regulator Rather than Macro Placer
69. NeurIPS 2024Targeted Sequential Indirect Experiment Design
70. NeurIPS 2024What Makes Partial-Label Learning Algorithms Effective?
71. NeurIPS 2023AQuA: A Benchmarking Tool for Label Quality Assessment
72. NeurIPS 2023Circuit as Set of Points
73. NeurIPS 2023Computing Optimal Equilibria and Mechanisms via Learning in Zero-Sum Extensive-Form Games
74. NeurIPS 2023Datasets and Benchmarks for Nanophotonic Structure and Parametric Design Simulations
75. NeurIPS 2023Deep Contract Design via Discontinuous Networks
76. NeurIPS 2023Experimental Designs for Heteroskedastic Variance
77. NeurIPS 2023Macro Placement by Wire-Mask-Guided Black-Box Optimization
78. NeurIPS 2023Mechanism Design for Collaborative Normal Mean Estimation
79. NeurIPS 2023Mode Connectivity in Auction Design
80. NeurIPS 2023On the Robustness of Mechanism Design under Total Variation Distance
81. NeurIPS 2023ProteinNPT: Improving Protein Property Prediction and Design with Non-Parametric Transformers
82. NeurIPS 2023Refined Mechanism Design for Approximately Structured Priors via Active Regression
83. NeurIPS 2023Utilitarian Algorithm Configuration

FAQ

How many Chip Design ML papers were published at NeurIPS, ICLR, ICML and CVPR from 2023 to 2026?

179 in total: 28 in 2023, 43 in 2024, 44 in 2025, 64 in 2026.

How many Chip Design ML papers are at NeurIPS 2026?

NeurIPS 2026 has 34 Chip Design ML papers, versus 20 the year before.

How many Chip Design ML papers are at ICLR 2026?

ICLR 2026 has 9 Chip Design ML papers, versus 9 the year before.

How many Chip Design ML papers are at ICML 2026?

ICML 2026 has 18 Chip Design ML papers, versus 9 the year before.

How many Chip Design ML papers are at CVPR 2026?

CVPR 2026 has 3 Chip Design ML papers, versus 6 the year before.

Which conference publishes the most Chip Design ML papers?

NeurIPS, with 83 papers from 2023 to 2026.